x86-64 foundations recap

This chapter took you inside the machinery: the registers where all the work happens, the movs that feed them, the arithmetic that transforms them, and the addressing modes that connect them to memory. Let's review each lesson before you test yourself.

The General-Purpose Registers

x86-64 provides 16 general-purpose registers: the historically named eight (rax, rbx, rcx, rdx, rsi, rdi, rbp, rsp) and the numbered eight (r8–r15). Their roles are agreements from the calling convention, not hardware rules: the first six integer or pointer arguments arrive in rdi, rsi, rdx, rcx, r8, r9, and the return value comes back in rax (or eax). rsp (stack pointer) and rbp (frame pointer) are reserved for stack bookkeeping, and registers split into callee-saved (like rbx and r12–r15, which must survive a call) and caller-saved scratch registers that a called function may clobber.

Register Sizes and Sub-Registers

A 64-bit register has up to four nested names, one per access size: rax (64 bits), eax (low 32), ax (low 16), and al (lowest byte). The numbered registers use suffixes instead: r8d, r8w, r8b. The compiler picks the name whose size matches the C++ type, so the register name is your size label when reading. One special rule: writing a 32-bit register zeroes the upper 32 bits of the full register, which the compiler exploits for free unsigned widening, while movsx handles signed widening by propagating the sign bit.

Moving Data with mov

mov dst, src copies the source into the destination, leaving the source unchanged. Operands can be an immediate, a register, or a memory location, with one forbidden combination: memory-to-memory. Brackets on the source mean a load (read memory into a register); brackets on the destination mean a store (write a register to memory), which is exactly how pointer dereferences appear:

mov DWORD PTR [rdi], esi   ; store: *p = value
mov eax, DWORD PTR [rdi]   ; load:  return *p

A size keyword like DWORD PTR is required when no register operand pins down the size, and unoptimized code is full of store-then-reload mov chains through stack slots that the optimizer later removes. movzx and movsx are the mov variants for copying a smaller value into a larger register.

Arithmetic Instructions

Most arithmetic is two-operand and in-place: add eax, edx means eax = eax + edx, overwriting the destination. add, sub, and imul implement +, -, and *; with sub, operand order matters because the source is subtracted from the destination. imul also has a three-operand form (imul eax, edi, 100) for multiplying by a constant without overwriting an input. inc, dec, and neg add one, subtract one, and negate, though compilers often prefer add or lea over inc. The optimizer may also rewrite the algebra of an expression: the assembly computes the same value, not necessarily by your exact steps.

Operands and Addressing Modes

A memory operand is a recipe for computing an address: displacement[base + index*scale], evaluating to base + index*scale + displacement. The scale must be 1, 2, 4, or 8, matching the sizes of common element types, which makes the mode purpose-built for array + index * sizeof(element). The signature of int-array indexing is [rdi+rsi*4], computed and dereferenced in a single instruction at -O2, while -O0 spells out the same address arithmetic across several instructions. Read any bracketed operand by adding its pieces together; the size keyword tells you how many bytes are accessed.

lea: The Address Calculator

lea (load effective address) computes the address a memory operand describes and stores that address in a register, without ever touching memory. Its honest use is taking addresses: C++'s & compiles to instructions like lea rax, [rdi+rsi*4] for &base[i]. Its clever use is fast arithmetic: lea eax, 7[rdi+rsi*4] computes a + b*4 + 7 in one instruction. Compilers favour it because it reads multiple registers, writes a separate destination, and does not modify the flags; context tells you whether its result is being used as an address or as a plain number.

Key Terminology

  • General-purpose register: One of the 16 named 64-bit storage slots the CPU computes with
  • Calling convention: The system-wide agreement on which registers hold arguments, return values, and preserved data
  • Argument registers: rdi, rsi, rdx, rcx, r8, r9, in that order, for the first six integer/pointer arguments
  • Return register: rax/eax, where a function leaves its integer or pointer result
  • Stack pointer (rsp) / frame pointer (rbp): The two registers reserved for stack bookkeeping
  • Callee-saved / caller-saved: Whether a register must be preserved by the called function or may be clobbered
  • Sub-register: A smaller-sized name for part of a register, such as eax, ax, and al inside rax
  • Zero-extension / sign-extension: Filling widened bits with zeros (movzx, or a 32-bit write) or with the sign bit (movsx)
  • Load / store: Reading memory into a register / writing a register out to memory
  • Immediate: A literal constant baked into an instruction
  • In-place arithmetic: The two-operand pattern where the destination is both an input and the result
  • Addressing mode: The address recipe displacement[base + index*scale] inside a memory operand
  • Scale: The constant multiplier on the index register, limited to 1, 2, 4, or 8
  • Displacement: The constant offset added into an address computation
  • lea: Load effective address; computes an address (or arbitrary base + index*scale + displacement arithmetic) without accessing memory
  • Flags: CPU status bits updated by add and sub but left untouched by lea

Looking Forward

If you ever need these details at a glance, the chapter ends with an x86-64 quick reference sheet you can return to at any time. Next, Chapter 3 turns to control flow: how cmp and test set the flags register, how conditional jumps read it, and how those pieces assemble into the if statements, loops, and switch statements you write every day. The cmp-plus-jump pair you met in Chapter 1 is about to become the centre of attention.